Optimization of Al2O3 Based VARIOT Engineered Tunnel Dielectric for Floating Gate Flash Scaling

The scaling opportunities of the conventional SiO2 tunnel dielectric are very limited, leading to the impossibility to decrease the write and erase voltages of Flash memory, which is a major burden for floating gate Flash memory scaling. Reduction of the (effective) thickness of the interpoly dielectric can be obtained by the use of high-k materials [1], but reducing the effective thickness of the tunnel oxide requires the use of engineered tunneling barriers such as the crested barrier [2] or the VARIOT (variable oxide thickness) stack [3][4][5], the latter being used in this work. As has previously been shown [6][7], Al2O3 is the most promising high-k dielectric for the Flash cell gate stack. In this work, we evaluate the effect of different parameters (stack composition, deposition method, post-deposition treatment) on the reliability of Al2O3 based VARIOT dielectric stacks.