可逆统计最大/最小操作:概念及定时应用

D. Sinha, C. Visweswariah, Natesan Venkateswaran, Jinjun Xiong, V. Zolotov
{"title":"可逆统计最大/最小操作:概念及定时应用","authors":"D. Sinha, C. Visweswariah, Natesan Venkateswaran, Jinjun Xiong, V. Zolotov","doi":"10.1145/2228360.2228554","DOIUrl":null,"url":null,"abstract":"The increasing significance of variability in modern sub-micron manufacturing process has led to the development and use of statistical techniques for chip timing analysis and optimization. Statistical timing involves fundamental operations like statistical-add, sub, max and min to propagate timing information (modeled as random variables with known probability distributions) through a timing graph model of a chip design. Although incremental timing during optimization updates timing information of only certain parts of the timing-graph, lack of established reversible statistical max or min techniques forces more-than-required computations. This paper describes the concept of reversible statistical max and min for correlated Gaussian random variables, and suggests potential applications to statistical timing. A formal proof is presented to establish the uniqueness of reversible statistical max. Experimental results show run-time savings when using the presented technique in the context of chipslack computation during incremental timing optimization.","PeriodicalId":263599,"journal":{"name":"DAC Design Automation Conference 2012","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Reversible statistical max/min operation: Concept and applications to timing\",\"authors\":\"D. Sinha, C. Visweswariah, Natesan Venkateswaran, Jinjun Xiong, V. Zolotov\",\"doi\":\"10.1145/2228360.2228554\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The increasing significance of variability in modern sub-micron manufacturing process has led to the development and use of statistical techniques for chip timing analysis and optimization. Statistical timing involves fundamental operations like statistical-add, sub, max and min to propagate timing information (modeled as random variables with known probability distributions) through a timing graph model of a chip design. Although incremental timing during optimization updates timing information of only certain parts of the timing-graph, lack of established reversible statistical max or min techniques forces more-than-required computations. This paper describes the concept of reversible statistical max and min for correlated Gaussian random variables, and suggests potential applications to statistical timing. A formal proof is presented to establish the uniqueness of reversible statistical max. Experimental results show run-time savings when using the presented technique in the context of chipslack computation during incremental timing optimization.\",\"PeriodicalId\":263599,\"journal\":{\"name\":\"DAC Design Automation Conference 2012\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"DAC Design Automation Conference 2012\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2228360.2228554\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"DAC Design Automation Conference 2012","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2228360.2228554","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

摘要

在现代亚微米制造过程中,变异性的重要性日益增加,导致了芯片时序分析和优化的统计技术的发展和使用。统计时序是指通过芯片设计的时序图模型来传播时序信息(建模为具有已知概率分布的随机变量)的基本运算,如统计加法、子运算、最大运算和最小运算。虽然优化过程中的增量计时只更新计时图中某些部分的计时信息,但由于缺乏已建立的可逆统计最大值或最小值技术,需要进行更多的计算。本文描述了相关高斯随机变量的可逆统计最大值和最小值的概念,并提出了在统计定时中的潜在应用。给出了可逆统计极大值唯一性的形式化证明。实验结果表明,在增量时间优化过程中,在芯片松弛计算的背景下使用该技术可以节省运行时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Reversible statistical max/min operation: Concept and applications to timing
The increasing significance of variability in modern sub-micron manufacturing process has led to the development and use of statistical techniques for chip timing analysis and optimization. Statistical timing involves fundamental operations like statistical-add, sub, max and min to propagate timing information (modeled as random variables with known probability distributions) through a timing graph model of a chip design. Although incremental timing during optimization updates timing information of only certain parts of the timing-graph, lack of established reversible statistical max or min techniques forces more-than-required computations. This paper describes the concept of reversible statistical max and min for correlated Gaussian random variables, and suggests potential applications to statistical timing. A formal proof is presented to establish the uniqueness of reversible statistical max. Experimental results show run-time savings when using the presented technique in the context of chipslack computation during incremental timing optimization.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信