SERDES双输出缓冲器,以减少共模噪声

Jianquan Lou, A. Bhobe, Hailong Zhang, Xiao Li, Yingchun Shu
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引用次数: 0

摘要

SERDES链路的两倍奈奎斯特频率辐射及其谐波是核心开关等高速产品的主要电磁干扰问题,它是由于SERDES差分信号的上升时间和下降时间不匹配导致SERDES链路中产生的共模电流引起的。通过分析SERDES的电流模式逻辑(CML)输出缓冲器电路,阐述了产生上升时间和下降时间不匹配的原因。本文提出了一种新的方案来解决晶体管级失配的根本原因,然后说明了如何在噪声源的起始位置匹配上升时间和下降时间的机制。这种新方法对芯片面积和功耗的影响很小,同时可以显著降低EMI噪声。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SERDES With Dual Output Buffer to Reduce Common Mode Noise
The radiation of twice Nyquist frequency and its harmonics from SERDES link is a main EMI issue in high speed products such as core switch, it is caused by common mode current generated in SERDES link, which is due to the risetime and falltime mismatch between SERDES differential signals. The reason why risetime and falltime mismatch occur is demonstrated by analyzing the circuit of current mode logic (CML) output buffer of SERDES. A new proposal is presented in this paper to address the mismatch root cause in transistor level, followed by the illustration of the mechanism how to match the risetime and falltime at the very beginning of the noise source. This new method has very little impact on the chip real estate and power consumption, while can reduce the EMI noise significantly.
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