ALU based address generation for RAMs

Memory Built-In Self-Test has become a standard industrial practice. Its quality is mainly determined by its fault detection capability in combination with its required area overhead. Address Generators have a significant contribution to the area overhead. Previously published schemes have proposed the address generator implementations based on counter modules. In this work we present an ALU-based address generator implementation; the proposed scheme present lower hardware overhead compared to the previously proposed one, provided the availability of the ALU or the counter in the circuit.