Monika Sharma, Mridula Gupta, R. Narang, M. Saxena
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Investigation of Gate All Around Junctionless Nanowire Transistor with Arbitrary Polygonal Cross Section
This paper presents an analytical model for the calculation of the potential distribution in junctionless nanowire transistors with an arbitrary regular polygon as a cross-section. Two different cases concerning circular and square cross-sections are particularly investigated and analyzed. Poisson’s equation is being solved and electric potential is obtained. With the potential model, an explicit comparison is done between square cross-section GAA transistor and cylindrical GAA transistor which is being further investigated for circuit design and tested for the CMOS inverter application. The proposed model is validated using 3D ATLAS simulations.