一种具有高时间分辨率和低时钟频率的新型DPWM结构

Chen Xiao, Wei Ting-cun, Chen Nan
{"title":"一种具有高时间分辨率和低时钟频率的新型DPWM结构","authors":"Chen Xiao, Wei Ting-cun, Chen Nan","doi":"10.1109/ICICIP.2014.7010283","DOIUrl":null,"url":null,"abstract":"This paper presents a novel digital pulse width modulator (DPWM) structure with higher time resolution and lower input clock frequency, which is especially suitable for high frequency digitally controlled DC-DC switching converters. For the proposed DPWM, two multi-phase clock arrays are generated which have relatively close frequencies, and the time-inserting method is also utilized. The FPGA based simulation results show that, the proposed DPWM can achieve the time resolution of around 30ps and the equivalent 12-bits precision when the input dual-clock frequencies are 100MHz and 105MHz at 5MHz switching frequency.","PeriodicalId":408041,"journal":{"name":"Fifth International Conference on Intelligent Control and Information Processing","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A novel DPWM structure with high time resolution and low clock frequency\",\"authors\":\"Chen Xiao, Wei Ting-cun, Chen Nan\",\"doi\":\"10.1109/ICICIP.2014.7010283\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel digital pulse width modulator (DPWM) structure with higher time resolution and lower input clock frequency, which is especially suitable for high frequency digitally controlled DC-DC switching converters. For the proposed DPWM, two multi-phase clock arrays are generated which have relatively close frequencies, and the time-inserting method is also utilized. The FPGA based simulation results show that, the proposed DPWM can achieve the time resolution of around 30ps and the equivalent 12-bits precision when the input dual-clock frequencies are 100MHz and 105MHz at 5MHz switching frequency.\",\"PeriodicalId\":408041,\"journal\":{\"name\":\"Fifth International Conference on Intelligent Control and Information Processing\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Fifth International Conference on Intelligent Control and Information Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICIP.2014.7010283\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth International Conference on Intelligent Control and Information Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICIP.2014.7010283","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种新颖的数字脉宽调制器(DPWM)结构,具有较高的时间分辨率和较低的输入时钟频率,特别适用于高频数字控制DC-DC开关变换器。对于所提出的DPWM,生成两个频率相对接近的多相时钟阵列,并采用时间插入方法。基于FPGA的仿真结果表明,在5MHz开关频率下,当输入双时钟频率分别为100MHz和105MHz时,所提出的DPWM可以达到30ps左右的时间分辨率和等效的12位精度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A novel DPWM structure with high time resolution and low clock frequency
This paper presents a novel digital pulse width modulator (DPWM) structure with higher time resolution and lower input clock frequency, which is especially suitable for high frequency digitally controlled DC-DC switching converters. For the proposed DPWM, two multi-phase clock arrays are generated which have relatively close frequencies, and the time-inserting method is also utilized. The FPGA based simulation results show that, the proposed DPWM can achieve the time resolution of around 30ps and the equivalent 12-bits precision when the input dual-clock frequencies are 100MHz and 105MHz at 5MHz switching frequency.
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