{"title":"利用良率管理测试结构减少缺陷","authors":"H.M. Chou, C.C. Liu, C.J. Kuo, J.H. Hwang, N.W. Wu, M.C. Chang","doi":"10.1109/ISSM.1994.729442","DOIUrl":null,"url":null,"abstract":"Design and applications of Yield Management test patterns on memory products have been reviewed. Evaluations are made for Y.M. patterns and conventional T.K. patterns in terms of their ability to faithfully point out process deviations/defects and to predict CP yield. It s assessed that Y.M. patterns are superior to T.K. patterns in terms of the previous criteria. Finally, design guidelines will be also discussed.","PeriodicalId":114928,"journal":{"name":"International Symposium on Semiconductor Manufacturing, Extended Abstracts of ISSM","volume":"103 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Defect Reduction Using Yield Management Test Structures\",\"authors\":\"H.M. Chou, C.C. Liu, C.J. Kuo, J.H. Hwang, N.W. Wu, M.C. Chang\",\"doi\":\"10.1109/ISSM.1994.729442\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design and applications of Yield Management test patterns on memory products have been reviewed. Evaluations are made for Y.M. patterns and conventional T.K. patterns in terms of their ability to faithfully point out process deviations/defects and to predict CP yield. It s assessed that Y.M. patterns are superior to T.K. patterns in terms of the previous criteria. Finally, design guidelines will be also discussed.\",\"PeriodicalId\":114928,\"journal\":{\"name\":\"International Symposium on Semiconductor Manufacturing, Extended Abstracts of ISSM\",\"volume\":\"103 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Semiconductor Manufacturing, Extended Abstracts of ISSM\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSM.1994.729442\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Semiconductor Manufacturing, Extended Abstracts of ISSM","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSM.1994.729442","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Defect Reduction Using Yield Management Test Structures
Design and applications of Yield Management test patterns on memory products have been reviewed. Evaluations are made for Y.M. patterns and conventional T.K. patterns in terms of their ability to faithfully point out process deviations/defects and to predict CP yield. It s assessed that Y.M. patterns are superior to T.K. patterns in terms of the previous criteria. Finally, design guidelines will be also discussed.