Y. Fujisaki, H. Tsugawa, K. Sakai, H. Kumagai, R. Nakamura, T. Ogita, S. Endo, T. Iwase, H. Takase, K. Yokochi, S. Yoshida, S. Shimada, Y. Otake, T. Wakano, H. Hiyama, K. Hagiwara, M. Arakawal, S. Matsumotol, H. Maeda, K. Sugihara, K. Takabayashi, M. Ono, K. Ishibashi, K. Yamamoto
{"title":"采用双衍射结构和2×2片上透镜,设计了一种背光6 μm SPAD深度传感器,PDE为36.5%,波长为940 nm","authors":"Y. Fujisaki, H. Tsugawa, K. Sakai, H. Kumagai, R. Nakamura, T. Ogita, S. Endo, T. Iwase, H. Takase, K. Yokochi, S. Yoshida, S. Shimada, Y. Otake, T. Wakano, H. Hiyama, K. Hagiwara, M. Arakawal, S. Matsumotol, H. Maeda, K. Sugihara, K. Takabayashi, M. Ono, K. Ishibashi, K. Yamamoto","doi":"10.23919/VLSITechnologyandCir57934.2023.10185251","DOIUrl":null,"url":null,"abstract":"We present a back-illuminated 3D-stacked 6 $\\mu \\mathrm{m}$ single-photon avalanche diode (SPAD) sensor with very high photon detection efficiency (PDE) performance. To enhance PDE, a dual diffraction structure was combined with $2\\times 2$ on-chip lens (OCL) for the first time. A dual diffraction structure comprises a pyramid surface for diffraction (PSD) and periodic uneven structures by shallow trench for diffraction formed on the Si surface of light-facing and opposite sides, respectively. Additionally, PSD pitch and SiO2 film thickness buried in full trench isolation were optimized. Consequently, a PDE of 36.5% was achieved at $\\lambda=940$ nm, the world’s highest value. Owing to shield ring contact, crosstalk was reduced by about half compared to a conventionally plugged one.","PeriodicalId":317958,"journal":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A back-illuminated 6 μm SPAD depth sensor with PDE 36.5% at 940 nm via combination of dual diffraction structure and 2×2 on-chip lens\",\"authors\":\"Y. Fujisaki, H. Tsugawa, K. Sakai, H. Kumagai, R. Nakamura, T. Ogita, S. Endo, T. Iwase, H. Takase, K. Yokochi, S. Yoshida, S. Shimada, Y. Otake, T. Wakano, H. Hiyama, K. Hagiwara, M. Arakawal, S. Matsumotol, H. Maeda, K. Sugihara, K. Takabayashi, M. Ono, K. Ishibashi, K. Yamamoto\",\"doi\":\"10.23919/VLSITechnologyandCir57934.2023.10185251\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a back-illuminated 3D-stacked 6 $\\\\mu \\\\mathrm{m}$ single-photon avalanche diode (SPAD) sensor with very high photon detection efficiency (PDE) performance. To enhance PDE, a dual diffraction structure was combined with $2\\\\times 2$ on-chip lens (OCL) for the first time. A dual diffraction structure comprises a pyramid surface for diffraction (PSD) and periodic uneven structures by shallow trench for diffraction formed on the Si surface of light-facing and opposite sides, respectively. Additionally, PSD pitch and SiO2 film thickness buried in full trench isolation were optimized. Consequently, a PDE of 36.5% was achieved at $\\\\lambda=940$ nm, the world’s highest value. Owing to shield ring contact, crosstalk was reduced by about half compared to a conventionally plugged one.\",\"PeriodicalId\":317958,\"journal\":{\"name\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185251\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185251","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
我们提出了一种背光源3d堆叠6 $\mu \mathrm{m}$单光子雪崩二极管(SPAD)传感器,具有非常高的光子探测效率(PDE)性能。为了提高PDE,首次将双衍射结构与$2\times 2$片上透镜(OCL)相结合。双衍射结构包括金字塔衍射面(PSD)和分别在面向光和相对面硅表面形成的浅沟槽衍射的周期性不均匀结构。此外,还优化了全沟隔离埋置的PSD间距和SiO2膜厚度。因此,PDE为36.5% was achieved at $\lambda=940$ nm, the world’s highest value. Owing to shield ring contact, crosstalk was reduced by about half compared to a conventionally plugged one.
A back-illuminated 6 μm SPAD depth sensor with PDE 36.5% at 940 nm via combination of dual diffraction structure and 2×2 on-chip lens
We present a back-illuminated 3D-stacked 6 $\mu \mathrm{m}$ single-photon avalanche diode (SPAD) sensor with very high photon detection efficiency (PDE) performance. To enhance PDE, a dual diffraction structure was combined with $2\times 2$ on-chip lens (OCL) for the first time. A dual diffraction structure comprises a pyramid surface for diffraction (PSD) and periodic uneven structures by shallow trench for diffraction formed on the Si surface of light-facing and opposite sides, respectively. Additionally, PSD pitch and SiO2 film thickness buried in full trench isolation were optimized. Consequently, a PDE of 36.5% was achieved at $\lambda=940$ nm, the world’s highest value. Owing to shield ring contact, crosstalk was reduced by about half compared to a conventionally plugged one.