一个四问题无序RISC CPU

1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC Pub Date : 1996-02-08 DOI:10.1109/ISSCC.1996.488574

J. Lotz, S. Naffziger, D. Kipp

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引用次数: 23

摘要

一个运行在150-250 MHz范围内的64b 4路标量PA-RISC微处理器系统结合了全乱序执行和低周期时间，产生>360规格和>550规格。专门的锁存和时钟电路以及动态逻辑的广泛使用使高频操作成为可能。3.8 M逻辑晶体管集成在3.3 V 0.5 /spl mu/ M CMOS的17.68/spl次/19.1 mm/sup 2/芯片上。

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A quad-issue out-of-order RISC CPU

A 64 b 4-way superscalar PA-RISC microprocessor system operating from 150-250 MHz combines full out-of-order execution with low-cycle time, to produce >360 specint and >550 specfp. Specialized latching and clock circuits and extensive use of dynamic logic enable high frequency operation. 3.8 M logic transistors are integrated on a 17.68/spl times/19.1 mm/sup 2/ die in 3.3 V 0.5 /spl mu/m CMOS.

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来源期刊

1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC

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