U-MRAM:无晶体管，高速(10ns)，低电压(0.6 V)，用于高密度数据存储器的无场单极MRAM

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) Pub Date : 2023-06-11 DOI:10.23919/VLSITechnologyandCir57934.2023.10185336

Ming-Hung Wu, Ming-Chun Hong, Ching-Kuei Shih, Yao-Jen Chang, Y. Hsin, Shih-Ching Chiu, Kuan-Ming Chen, Yi-Hui Su, Chih-Yao Wang, Shan-Yi Yang, Guan-Long Chen, Hsin-Han Lee, S. Z. Rahaman, I. Wang, Chen-Yi Shih, Tsun-Chun Chang, Jeng-Hua Wei, S. Sheu, W. Lo, Shih-Chieh Chang, T. Hou

{"title":"U-MRAM:无晶体管，高速(10ns)，低电压(0.6 V)，用于高密度数据存储器的无场单极MRAM","authors":"Ming-Hung Wu, Ming-Chun Hong, Ching-Kuei Shih, Yao-Jen Chang, Y. Hsin, Shih-Ching Chiu, Kuan-Ming Chen, Yi-Hui Su, Chih-Yao Wang, Shan-Yi Yang, Guan-Long Chen, Hsin-Han Lee, S. Z. Rahaman, I. Wang, Chen-Yi Shih, Tsun-Chun Chang, Jeng-Hua Wei, S. Sheu, W. Lo, Shih-Chieh Chang, T. Hou","doi":"10.23919/VLSITechnologyandCir57934.2023.10185336","DOIUrl":null,"url":null,"abstract":"U-MRAM, an enabler of a diode-selected cross-point MRAM array, is demonstrated using a mature device structure identical to STT-MRAM. U-MRAM exploits the probabilistic switching of thermal fluctuations using a single write voltage. The asymmetric synthetic antiferromagnetic layer (SAF) enables promising UMRAM properties, including low voltage (0.6 V), high speed (10 ns), excellent endurance (>$10^{10})$, and long retention (>10 years) without an external magnetic field. Diode-selected U-MRAM is a strong candidate for future high-density embedded memory.","PeriodicalId":317958,"journal":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"U-MRAM: Transistor-Less, High-Speed (10 ns), Low-Voltage (0.6 V), Field-Free Unipolar MRAM for High-Density Data Memory\",\"authors\":\"Ming-Hung Wu, Ming-Chun Hong, Ching-Kuei Shih, Yao-Jen Chang, Y. Hsin, Shih-Ching Chiu, Kuan-Ming Chen, Yi-Hui Su, Chih-Yao Wang, Shan-Yi Yang, Guan-Long Chen, Hsin-Han Lee, S. Z. Rahaman, I. Wang, Chen-Yi Shih, Tsun-Chun Chang, Jeng-Hua Wei, S. Sheu, W. Lo, Shih-Chieh Chang, T. Hou\",\"doi\":\"10.23919/VLSITechnologyandCir57934.2023.10185336\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"U-MRAM, an enabler of a diode-selected cross-point MRAM array, is demonstrated using a mature device structure identical to STT-MRAM. U-MRAM exploits the probabilistic switching of thermal fluctuations using a single write voltage. The asymmetric synthetic antiferromagnetic layer (SAF) enables promising UMRAM properties, including low voltage (0.6 V), high speed (10 ns), excellent endurance (>$10^{10})$, and long retention (>10 years) without an external magnetic field. Diode-selected U-MRAM is a strong candidate for future high-density embedded memory.\",\"PeriodicalId\":317958,\"journal\":{\"name\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185336\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185336","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

U-MRAM是二极管选择交叉点MRAM阵列的实现器，使用与STT-MRAM相同的成熟器件结构进行演示。U-MRAM利用单个写入电压利用热波动的概率开关。非对称合成反铁磁层(SAF)使UMRAM具有良好的性能，包括低电压(0.6 V)，高速(10 ns)，优异的耐用性(>10 ^{10})和长保留时间(>10年)，而无需外部磁场。二极管选择的U-MRAM是未来高密度嵌入式存储器的有力候选。

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U-MRAM: Transistor-Less, High-Speed (10 ns), Low-Voltage (0.6 V), Field-Free Unipolar MRAM for High-Density Data Memory

U-MRAM, an enabler of a diode-selected cross-point MRAM array, is demonstrated using a mature device structure identical to STT-MRAM. U-MRAM exploits the probabilistic switching of thermal fluctuations using a single write voltage. The asymmetric synthetic antiferromagnetic layer (SAF) enables promising UMRAM properties, including low voltage (0.6 V), high speed (10 ns), excellent endurance (>$10^{10})$, and long retention (>10 years) without an external magnetic field. Diode-selected U-MRAM is a strong candidate for future high-density embedded memory.

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2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

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