{"title":"CMOS和BJT RF-LNAs的比较","authors":"H. Fouad, K. Sharaf, E. El-Diwany, H. El-Hennawy","doi":"10.1109/NRSC.2002.1022658","DOIUrl":null,"url":null,"abstract":"A simulation comparison of MOSFETs low noise amplifier (LNA) versus BJT LNA is proposed using a Pspice simulator. The MOSFET LNA was simulated and designed with a 0.5 /spl mu/m CMOS MOSIS process. It was concluded that the use of low-cost and high integration CMOS technology results in a penalty in the power dissipation and frequency response which are much better in bipolar technology. The comparison is performed at an operating frequency of 1.0 GHz.","PeriodicalId":231600,"journal":{"name":"Proceedings of the Nineteenth National Radio Science Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A comparison of CMOS and BJT RF-LNAs\",\"authors\":\"H. Fouad, K. Sharaf, E. El-Diwany, H. El-Hennawy\",\"doi\":\"10.1109/NRSC.2002.1022658\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A simulation comparison of MOSFETs low noise amplifier (LNA) versus BJT LNA is proposed using a Pspice simulator. The MOSFET LNA was simulated and designed with a 0.5 /spl mu/m CMOS MOSIS process. It was concluded that the use of low-cost and high integration CMOS technology results in a penalty in the power dissipation and frequency response which are much better in bipolar technology. The comparison is performed at an operating frequency of 1.0 GHz.\",\"PeriodicalId\":231600,\"journal\":{\"name\":\"Proceedings of the Nineteenth National Radio Science Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Nineteenth National Radio Science Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NRSC.2002.1022658\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Nineteenth National Radio Science Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NRSC.2002.1022658","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
利用Pspice模拟器对mosfet低噪声放大器(LNA)和BJT LNA进行了仿真比较。采用0.5 /spl μ m CMOS MOSIS工艺对MOSFET LNA进行了仿真设计。结果表明,采用低成本、高集成度的CMOS技术可以降低功耗和频率响应,而双极技术的性能要好得多。在工作频率为1.0 GHz的情况下进行比较。
A simulation comparison of MOSFETs low noise amplifier (LNA) versus BJT LNA is proposed using a Pspice simulator. The MOSFET LNA was simulated and designed with a 0.5 /spl mu/m CMOS MOSIS process. It was concluded that the use of low-cost and high integration CMOS technology results in a penalty in the power dissipation and frequency response which are much better in bipolar technology. The comparison is performed at an operating frequency of 1.0 GHz.