{"title":"新型三氧化沟槽深栅LDMOS提高自热效应和击穿电压的设计考虑","authors":"Amir Gavoshani, Ali A. Orouji","doi":"10.1049/cds2.12102","DOIUrl":null,"url":null,"abstract":"<p>In this study, design considerations of a new device structure are presented to improve the self-heating effect (SHE) and the breakdown voltage of the Deep Gate LDMOS (Lateral Double Diffused Metal Oxide Semiconductor) transistor and compared with a conventional LDMOS (C-LDMOS). In this case, triple oxide trenches with an <i>N</i><sup>+</sup> trench are embedded in the drift region. These trenches create additional peaks in the electric field profile, so the electric field is modified. The authors demonstrate that by optimising the trenches, the breakdown voltage of the device increases. Also, a partially buried oxide is used in the proposed structure to create a conduction path that significantly reduces the SHE. Moreover, the results indicate that the specific on-resistance, lattice temperature, and breakdown voltage of the proposed device are improved considerably compared to the C-LDMOS.</p>","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"16 3","pages":"272-279"},"PeriodicalIF":1.0000,"publicationDate":"2021-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12102","citationCount":"4","resultStr":"{\"title\":\"Design considerations of a novel Triple Oxide Trench Deep Gate LDMOS to improve self-heating effect and breakdown voltage\",\"authors\":\"Amir Gavoshani, Ali A. Orouji\",\"doi\":\"10.1049/cds2.12102\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>In this study, design considerations of a new device structure are presented to improve the self-heating effect (SHE) and the breakdown voltage of the Deep Gate LDMOS (Lateral Double Diffused Metal Oxide Semiconductor) transistor and compared with a conventional LDMOS (C-LDMOS). In this case, triple oxide trenches with an <i>N</i><sup>+</sup> trench are embedded in the drift region. These trenches create additional peaks in the electric field profile, so the electric field is modified. The authors demonstrate that by optimising the trenches, the breakdown voltage of the device increases. Also, a partially buried oxide is used in the proposed structure to create a conduction path that significantly reduces the SHE. Moreover, the results indicate that the specific on-resistance, lattice temperature, and breakdown voltage of the proposed device are improved considerably compared to the C-LDMOS.</p>\",\"PeriodicalId\":50386,\"journal\":{\"name\":\"Iet Circuits Devices & Systems\",\"volume\":\"16 3\",\"pages\":\"272-279\"},\"PeriodicalIF\":1.0000,\"publicationDate\":\"2021-11-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12102\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Iet Circuits Devices & Systems\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://onlinelibrary.wiley.com/doi/10.1049/cds2.12102\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Iet Circuits Devices & Systems","FirstCategoryId":"5","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1049/cds2.12102","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Design considerations of a novel Triple Oxide Trench Deep Gate LDMOS to improve self-heating effect and breakdown voltage
In this study, design considerations of a new device structure are presented to improve the self-heating effect (SHE) and the breakdown voltage of the Deep Gate LDMOS (Lateral Double Diffused Metal Oxide Semiconductor) transistor and compared with a conventional LDMOS (C-LDMOS). In this case, triple oxide trenches with an N+ trench are embedded in the drift region. These trenches create additional peaks in the electric field profile, so the electric field is modified. The authors demonstrate that by optimising the trenches, the breakdown voltage of the device increases. Also, a partially buried oxide is used in the proposed structure to create a conduction path that significantly reduces the SHE. Moreover, the results indicate that the specific on-resistance, lattice temperature, and breakdown voltage of the proposed device are improved considerably compared to the C-LDMOS.
期刊介绍:
IET Circuits, Devices & Systems covers the following topics:
Circuit theory and design, circuit analysis and simulation, computer aided design
Filters (analogue and switched capacitor)
Circuit implementations, cells and architectures for integration including VLSI
Testability, fault tolerant design, minimisation of circuits and CAD for VLSI
Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs
Device and process characterisation, device parameter extraction schemes
Mathematics of circuits and systems theory
Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers