G. Georgakos, P. Huber, M. Ostermayr, E. Amirante, F. Ruckerbauer
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Investigation of Increased Multi-Bit Failure Rate Due to Neutron Induced SEU in Advanced Embedded SRAMs
This paper reports a dramatically increased multi-bit failure rate due to neutron induced single event upset (SEU) in 65 nm triple-well embedded SRAMs. Based on detailed fail-pattern analysis and circuit simulation a novel failure model is developed and relaxed ECC guidelines are derived.