电容耦合通道集成电路的无线晶圆级测试

Dae Young Lee, D. Wentzloff, J. Hayes
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引用次数: 9

摘要

长期以来,通过直接接触探针卡进行晶圆测试一直是在封装之前测试集成电路(IC)芯片的有效且相对低成本的方法。然而,晶圆片和自动测试设备(ATE)之间发生的物理接触由于接触点变形和需要磨料清洗而具有显著的成本。在本文中,我们研究了一种非接触测试技术,该技术无线耦合IC晶圆和ATE,并作为传统探针卡测试的替代方案。本文推导了电容测试通道的几种分析模型。电磁场仿真结果支持了所提出的信道模型。我们得出结论,基于电容的无线测试对于测试1 ghz范围内的ic是可行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Wireless wafer-level testing of integrated circuits via capacitively-coupled channels
Wafer testing via direct-contact probe cards has long been an effective and relatively low-cost method for testing integrated circuit (IC) chips prior to packaging. However, the physical contact occurring between the wafer and automatic test equipment (ATE) has significant costs due to contact point deformation and the need for abrasive cleaning. In this paper, we investigate a non-contact testing technique that wirelessly couples an IC wafer and ATE, and serves as an alternative to conventional probe-card testing. We derive several analytical models for a capacitive testing channel. Electromagnetic field simulations results are presented that support the proposed channel models. We conclude that capacitance-based wireless testing is feasible for testing ICs in the 1-GHz range.
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