Architecture exploration of intelligent robot system using ros-compliant FPGA component

This paper presents a novel method for architecture exploration of an intelligent robot system while satisfying high processing performance at low power by utilizing FPGA and remote computing resources. In order to ease development complexity in the conventional architecture exploration, ROS-compliant FPGA component technology is employed. As a case study, Visual SLAM (Self Localization and Mapping) processing is studied, which is important for realizing intelligent autonomous robots. Some part of Visual SLAM processing is to be off-loaded onto a remote server outside a robot and to be processed parallel in the server. At the same time, the essential part of front-end of SLAM processing stays in the robot itself to reduce communication traffic between the robot and the remote computing resources. We have studied SLAM processing to find optimum function partitioning. In order to distribute and parallelize this processing, we explored processing architecture for trade-offs of power and performance.