{"title":"带反馈的模拟集成电路高电平合成的二电平性能估计","authors":"A. Núñez-Aldana, R. Vemuri","doi":"10.1109/MMICA.1999.833626","DOIUrl":null,"url":null,"abstract":"In this paper, we present a technique for estimating the gain, bandwidth, power and area of analog integrated circuits. A two-step approach is adopted to speed up the estimation process and handle larger analog systems. In the first step, the performance of basic analog components is estimated using a knowledge-based approach. Then, component models are generated with the estimates produced at this phase. In the second phase, we use a symbolic analysis methodology to evaluate the performance at the system level. The system net-list is represented by a signal flow graph (SFG) using the component models generated at the previous phase. The SFG approach allows one to handle feedback loops at the system level.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Two level performance estimator for high level synthesis of analog integrated circuits with feedback\",\"authors\":\"A. Núñez-Aldana, R. Vemuri\",\"doi\":\"10.1109/MMICA.1999.833626\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present a technique for estimating the gain, bandwidth, power and area of analog integrated circuits. A two-step approach is adopted to speed up the estimation process and handle larger analog systems. In the first step, the performance of basic analog components is estimated using a knowledge-based approach. Then, component models are generated with the estimates produced at this phase. In the second phase, we use a symbolic analysis methodology to evaluate the performance at the system level. The system net-list is represented by a signal flow graph (SFG) using the component models generated at the previous phase. The SFG approach allows one to handle feedback loops at the system level.\",\"PeriodicalId\":221297,\"journal\":{\"name\":\"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)\",\"volume\":\"46 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-07-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MMICA.1999.833626\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MMICA.1999.833626","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Two level performance estimator for high level synthesis of analog integrated circuits with feedback
In this paper, we present a technique for estimating the gain, bandwidth, power and area of analog integrated circuits. A two-step approach is adopted to speed up the estimation process and handle larger analog systems. In the first step, the performance of basic analog components is estimated using a knowledge-based approach. Then, component models are generated with the estimates produced at this phase. In the second phase, we use a symbolic analysis methodology to evaluate the performance at the system level. The system net-list is represented by a signal flow graph (SFG) using the component models generated at the previous phase. The SFG approach allows one to handle feedback loops at the system level.