功率vdmosfet中潜在界面陷阱积累的新实验证据

1999 Fifth European Conference on Radiation and Its Effects on Components and Systems. RADECS 99 (Cat. No.99TH8471) Pub Date : 1999-09-13 DOI:10.1109/RADECS.1999.858592

A. Jaksic, G. Ristić, M. Pejovic

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引用次数: 9

摘要

本文提出了伽玛射线辐照功率vdmosfet在退火过程中潜在界面陷阱形成的新实验证据。我们试图通过等温退火、开关温度退火和开关偏置退火实验来揭示这种仍然不被理解的现象的本质。在辐射诱导缺陷辐照后行为的几种模型的背景下，讨论了得到的实验结果的可能解释。

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New experimental evidence of latent interface-trap buildup in power VDMOSFETs

The paper presents new experimental evidence of the latent interface-trap buildup during annealing of gamma-ray irradiated power VDMOSFETs. We try to reveal the nature of this still ill-understood phenomenon by isothermal annealing, switching temperature annealing and switching bias annealing experiments. Possible explanations of obtained experimental results are discussed in the context of several models for post-irradiation behavior of radiation-induced defects.

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1999 Fifth European Conference on Radiation and Its Effects on Components and Systems. RADECS 99 (Cat. No.99TH8471)

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