{"title":"面向细粒度电源管理策略的超低功耗多级上电复位","authors":"G. LuisE.Rueda, Nestor Cuevas, E. Roa","doi":"10.1109/LASCAS.2019.8667574","DOIUrl":null,"url":null,"abstract":"This paper proposes a multi-level POR circuit with programmable voltage thresholds, that can operate in different fine-grained power management strategies. The POR is designed in a 0.18µm standard-logic CMOS technology, and occupies an area of 110µm x 70µm. Simulations results show a robust performance over process and temperature variations (PVT), rising times ranging from 1µs to 1s, and different supply values, while consuming a current of 19nA.","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management Strategies\",\"authors\":\"G. LuisE.Rueda, Nestor Cuevas, E. Roa\",\"doi\":\"10.1109/LASCAS.2019.8667574\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a multi-level POR circuit with programmable voltage thresholds, that can operate in different fine-grained power management strategies. The POR is designed in a 0.18µm standard-logic CMOS technology, and occupies an area of 110µm x 70µm. Simulations results show a robust performance over process and temperature variations (PVT), rising times ranging from 1µs to 1s, and different supply values, while consuming a current of 19nA.\",\"PeriodicalId\":142430,\"journal\":{\"name\":\"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)\",\"volume\":\"2013 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LASCAS.2019.8667574\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2019.8667574","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
本文提出了一种具有可编程电压阈值的多级POR电路,可以在不同的细粒度电源管理策略下工作。POR采用0.18 μ m标准逻辑CMOS技术设计,占地面积为110 μ m x 70 μ m。仿真结果表明,在19nA电流的情况下,该电路在工艺和温度变化(PVT)、上升时间范围为1µs到1s以及不同的电源值下都具有良好的性能。
An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management Strategies
This paper proposes a multi-level POR circuit with programmable voltage thresholds, that can operate in different fine-grained power management strategies. The POR is designed in a 0.18µm standard-logic CMOS technology, and occupies an area of 110µm x 70µm. Simulations results show a robust performance over process and temperature variations (PVT), rising times ranging from 1µs to 1s, and different supply values, while consuming a current of 19nA.