A. Ulusoy, S. Krone, G. Liu, A. Trasser, F. Guderian, B. Almeroth, A. Barghouthi, M. Hellfeld, S. Schumann, C. Carta, C. Estañ, K. Dombrowski, V. Brankovic, D. Radović, F. Ellinger, G. Fettweis, H. Schumacher
{"title":"利用模拟同步和1位数据转换的60 GHz多gb /s系统演示器","authors":"A. Ulusoy, S. Krone, G. Liu, A. Trasser, F. Guderian, B. Almeroth, A. Barghouthi, M. Hellfeld, S. Schumann, C. Carta, C. Estañ, K. Dombrowski, V. Brankovic, D. Radović, F. Ellinger, G. Fettweis, H. Schumacher","doi":"10.1109/SIRF.2013.6489445","DOIUrl":null,"url":null,"abstract":"In this paper, a 60 GHz system demonstrator for multi-Gb/s, short-range, line-of-sight communications is presented. The system utilizes a highly efficient receiver architecture with phase noise suppression capability, which performs carrier synchronization in the analog domain, eliminating the need for high speed, high precision analog-to-digital converters. In the presented demonstrator, with only 1-bit data conversion at the transmitter and receiver, an error-free maximum raw data rate of 3.45 Gb/s is achieved using BPSK modulation over a wireless transmission distance of up to 1m. A more sophisticated modulation capability is demonstrated as well for a raw data rate of 6.9 Gb/s and a bit error rate of 10-5 usina QPSK modulation.","PeriodicalId":286070,"journal":{"name":"2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A 60 GHz multi-Gb/s system demonstrator utilizing analog synchronization and 1-bit data conversion\",\"authors\":\"A. Ulusoy, S. Krone, G. Liu, A. Trasser, F. Guderian, B. Almeroth, A. Barghouthi, M. Hellfeld, S. Schumann, C. Carta, C. Estañ, K. Dombrowski, V. Brankovic, D. Radović, F. Ellinger, G. Fettweis, H. Schumacher\",\"doi\":\"10.1109/SIRF.2013.6489445\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a 60 GHz system demonstrator for multi-Gb/s, short-range, line-of-sight communications is presented. The system utilizes a highly efficient receiver architecture with phase noise suppression capability, which performs carrier synchronization in the analog domain, eliminating the need for high speed, high precision analog-to-digital converters. In the presented demonstrator, with only 1-bit data conversion at the transmitter and receiver, an error-free maximum raw data rate of 3.45 Gb/s is achieved using BPSK modulation over a wireless transmission distance of up to 1m. A more sophisticated modulation capability is demonstrated as well for a raw data rate of 6.9 Gb/s and a bit error rate of 10-5 usina QPSK modulation.\",\"PeriodicalId\":286070,\"journal\":{\"name\":\"2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIRF.2013.6489445\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIRF.2013.6489445","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 60 GHz multi-Gb/s system demonstrator utilizing analog synchronization and 1-bit data conversion
In this paper, a 60 GHz system demonstrator for multi-Gb/s, short-range, line-of-sight communications is presented. The system utilizes a highly efficient receiver architecture with phase noise suppression capability, which performs carrier synchronization in the analog domain, eliminating the need for high speed, high precision analog-to-digital converters. In the presented demonstrator, with only 1-bit data conversion at the transmitter and receiver, an error-free maximum raw data rate of 3.45 Gb/s is achieved using BPSK modulation over a wireless transmission distance of up to 1m. A more sophisticated modulation capability is demonstrated as well for a raw data rate of 6.9 Gb/s and a bit error rate of 10-5 usina QPSK modulation.
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