{"title":"用二维数学模型分析高压开关晶体管","authors":"S. Gaur","doi":"10.1109/IEDM.1976.189008","DOIUrl":null,"url":null,"abstract":"A two-dimensional mathematical model which includes the avalanche multiplication and internal self-heating effects has been used to predict the internal behavior of a typical high-voltage power transistor design. Collector n--n+interface is the region of high electrical and thermal stresses which cause second breakdown failure at high-current and high-voltage operating conditions.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Analysis of high-voltage switching transistors by a two-dimensional mathematical model\",\"authors\":\"S. Gaur\",\"doi\":\"10.1109/IEDM.1976.189008\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A two-dimensional mathematical model which includes the avalanche multiplication and internal self-heating effects has been used to predict the internal behavior of a typical high-voltage power transistor design. Collector n--n+interface is the region of high electrical and thermal stresses which cause second breakdown failure at high-current and high-voltage operating conditions.\",\"PeriodicalId\":106190,\"journal\":{\"name\":\"1976 International Electron Devices Meeting\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1976 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1976.189008\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1976 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1976.189008","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of high-voltage switching transistors by a two-dimensional mathematical model
A two-dimensional mathematical model which includes the avalanche multiplication and internal self-heating effects has been used to predict the internal behavior of a typical high-voltage power transistor design. Collector n--n+interface is the region of high electrical and thermal stresses which cause second breakdown failure at high-current and high-voltage operating conditions.
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