{"title":"采用双输入级输入级和推挽“折叠”级联的反相连接中提高运算放大器快速响应的方法","authors":"N. Prokopenko, V. Chumakov, Dmitriy Klejmenkin","doi":"10.1109/EExPolytech56308.2022.9950851","DOIUrl":null,"url":null,"abstract":"A new method for connecting differentiating correction circuits in the inverting connection of the high-speed operational amplifiers (Op-Amp) implemented on the basis of a push-pull “folded” cascode is developed and studied. Forcing the processes of recharging an integrating balancing capacitor responsible for the formation of the logarithmic amplitude-frequency characteristic and ensuring the specified phase stability margin of the Op-Amp is provided in the suggested circuits. At the same time, the maximum slew rate increases significantly (by 10-100 times) up to 1000 $\\mathrm{V}/\\mu \\mathrm{s}-2000\\ \\mathrm{V}/\\mu \\mathrm{s}$, The results of computer simulation of CMOS and BJT high-speed Op-Amps in the inverting drivers of the high-speed ADCs implemented on the input stages of the dual-input-stage class are presented.","PeriodicalId":204076,"journal":{"name":"2022 International Conference on Electrical Engineering and Photonics (EExPolytech)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Method for Increasing Fast Response of the Operational Amplifiers in the Inverting Connection with an Input Stage of the Dual-Input-Stage Class and a Push-Pull “Folded” Cascode\",\"authors\":\"N. Prokopenko, V. Chumakov, Dmitriy Klejmenkin\",\"doi\":\"10.1109/EExPolytech56308.2022.9950851\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new method for connecting differentiating correction circuits in the inverting connection of the high-speed operational amplifiers (Op-Amp) implemented on the basis of a push-pull “folded” cascode is developed and studied. Forcing the processes of recharging an integrating balancing capacitor responsible for the formation of the logarithmic amplitude-frequency characteristic and ensuring the specified phase stability margin of the Op-Amp is provided in the suggested circuits. At the same time, the maximum slew rate increases significantly (by 10-100 times) up to 1000 $\\\\mathrm{V}/\\\\mu \\\\mathrm{s}-2000\\\\ \\\\mathrm{V}/\\\\mu \\\\mathrm{s}$, The results of computer simulation of CMOS and BJT high-speed Op-Amps in the inverting drivers of the high-speed ADCs implemented on the input stages of the dual-input-stage class are presented.\",\"PeriodicalId\":204076,\"journal\":{\"name\":\"2022 International Conference on Electrical Engineering and Photonics (EExPolytech)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 International Conference on Electrical Engineering and Photonics (EExPolytech)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EExPolytech56308.2022.9950851\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Electrical Engineering and Photonics (EExPolytech)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EExPolytech56308.2022.9950851","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Method for Increasing Fast Response of the Operational Amplifiers in the Inverting Connection with an Input Stage of the Dual-Input-Stage Class and a Push-Pull “Folded” Cascode
A new method for connecting differentiating correction circuits in the inverting connection of the high-speed operational amplifiers (Op-Amp) implemented on the basis of a push-pull “folded” cascode is developed and studied. Forcing the processes of recharging an integrating balancing capacitor responsible for the formation of the logarithmic amplitude-frequency characteristic and ensuring the specified phase stability margin of the Op-Amp is provided in the suggested circuits. At the same time, the maximum slew rate increases significantly (by 10-100 times) up to 1000 $\mathrm{V}/\mu \mathrm{s}-2000\ \mathrm{V}/\mu \mathrm{s}$, The results of computer simulation of CMOS and BJT high-speed Op-Amps in the inverting drivers of the high-speed ADCs implemented on the input stages of the dual-input-stage class are presented.