{"title":"用于GSM手机的多模CMOS低差稳压器","authors":"T. Barber, S. Ho, P. Ferguson","doi":"10.1109/VLSIC.2002.1015106","DOIUrl":null,"url":null,"abstract":"This paper presents a 1.8 V 400 mA multi-mode low dropout voltage regulator designed in a 0.25 /spl mu/m CMOS process. Multiple power modes are used to increase the efficiency of the regulator under both heavy and light loads. Under heavy loads, a high power driver with dynamic current bias and a DC/DC converter are used to improve the efficiency from 50% to 75%. Under light loads, a low power driver is used to improve the efficiency from 0.2% to 43.5%.","PeriodicalId":162493,"journal":{"name":"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Multi-mode CMOS low dropout voltage regulator for GSM handsets\",\"authors\":\"T. Barber, S. Ho, P. Ferguson\",\"doi\":\"10.1109/VLSIC.2002.1015106\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 1.8 V 400 mA multi-mode low dropout voltage regulator designed in a 0.25 /spl mu/m CMOS process. Multiple power modes are used to increase the efficiency of the regulator under both heavy and light loads. Under heavy loads, a high power driver with dynamic current bias and a DC/DC converter are used to improve the efficiency from 50% to 75%. Under light loads, a low power driver is used to improve the efficiency from 0.2% to 43.5%.\",\"PeriodicalId\":162493,\"journal\":{\"name\":\"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2002.1015106\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2002.1015106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
摘要
本文提出了一种采用0.25 /spl μ m CMOS工艺设计的1.8 V 400 mA多模低压差稳压器。采用多种功率模式,以提高稳压器在重载和轻负载下的效率。在高负载下,采用带动态偏置电流的大功率驱动器和DC/DC变换器将效率从50%提高到75%。在轻载情况下,采用低功耗驱动器,将效率从0.2%提高到43.5%。
Multi-mode CMOS low dropout voltage regulator for GSM handsets
This paper presents a 1.8 V 400 mA multi-mode low dropout voltage regulator designed in a 0.25 /spl mu/m CMOS process. Multiple power modes are used to increase the efficiency of the regulator under both heavy and light loads. Under heavy loads, a high power driver with dynamic current bias and a DC/DC converter are used to improve the efficiency from 50% to 75%. Under light loads, a low power driver is used to improve the efficiency from 0.2% to 43.5%.