集成100 MHz至1 GHz I/Q调制器与CML移相器

J. Hakkinen, T. Rahkonen, J. Kostamovaara
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引用次数: 1

摘要

在0.8 /spl mu/m BiCMOS工艺中,制作了适合于输出频率为100 MHz至1 GHz和基带频率为60至500 kHz的直接I/Q调制器。调制器采用基于数字CML锁存器的移相器拓扑结构。该电路从单个5v电源运行,它消耗约100毫安。电路尺寸为2.0 mm/spl倍/2.0 mm,封装在28引脚SOIC中。根据测量,在100 MHz时输出功率为-11/spl plusmn/0.5 dBm,在950 MHz时输出功率为-15/spl plusmn/ 2.25 dBm,温度范围为-10至+85/spl℃/C。LO抑制约为38 dBc,图像抑制约为41 dBc。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An integrated 100 MHz to 1 GHz I/Q modulator with CML phase shifter
A direct I/Q modulator suitable for operation at output frequencies from 100 MHz to 1 GHz and baseband frequencies from 60 to 500 kHz is fabricated in a 0.8 /spl mu/m BiCMOS process. The modulator uses a phase shifter topology based on digital CML latches. The circuit operates from a single 5 V supply and it consumes about 100 mA. The circuit size is 2.0 mm/spl times/2.0 mm and it is packed in a 28 pin SOIC. According to measurements, the output power is -11/spl plusmn/0.5 dBm at 100 MHz and -15/spl plusmn/ 2.25 dBm at 950 MHz over the temperature range of -10 to +85/spl deg/C. LO suppression is roughly 38 dBc and image rejection 41 dBc.
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