电压和频率耦合控制用于DVFS管理

M. Altieri, W. Lombardi, D. Puschini, S. Lesecq
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引用次数: 6

摘要

在过去的十年中,动态电压频率缩放(DVFS)技术被广泛提出,以提高集成电路的效率。当这些机构由电源电压和时钟频率的独立执行器组成时,必须使用预定义的顺序从一种状态切换到另一种状态,以避免不良情况。相反,当它们基于耦合驱动器时,则需要联合设计执行机构。在本工作中,提出了一种控制机构,在两个执行器独立开发的情况下,共同控制电压和频率的暂态。在保证系统全局稳定性和促进设计重用的同时,该控制器还提高了系统在过渡过程中的性能。它采用意法半导体32nm体块和28nm FD-SOI技术,需要相对较小的硅面积和功耗。给出了两种独立开发的驱动器的实验结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Coupled voltage and frequency control for DVFS management
During the last decade, Dynamic Voltage-Frequency Scaling (DVFS) techniques have been widely proposed to improve integrated circuit efficiency. When these mechanisms are composed of independent actuators for supply voltage and clock frequency, a predefined sequence has to be used to switch from one state to another one in order to avoid undesirable conditions. On the contrary, when they are based on coupled drivers, the actuators need to be jointly designed. In the present work, a control mechanism is proposed to jointly control the voltage and frequency transient periods where both actuators are developed independently. At the same time that it ensures the global system stability and promotes design reuse, the proposed controller also increases the system performance during the transition. Implemented in STMicroelectronics 32nm bulk and 28nm FD-SOI technologies, it requires a relatively small silicon area and power consumption. Experimental results with two independently developed drivers are provided.
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