H. Yaegashi, K. Oyama, A. Hara, Sakurako Natori, Shohei Yamauchi, Masatoshi Yamato, Noriaki Okabe, K. Koike
{"title":"支持10nm及以上的多模式功能","authors":"H. Yaegashi, K. Oyama, A. Hara, Sakurako Natori, Shohei Yamauchi, Masatoshi Yamato, Noriaki Okabe, K. Koike","doi":"10.1109/CSTIC.2015.7153363","DOIUrl":null,"url":null,"abstract":"Scaling in the manufacture of semiconductor devices has come to be supported by advances in photolithography technology. Looking to the future, we can expect even more advances in photolithography, but at present, multi-patterning using 193nm immersion lithography is finding widespread use as an alternative technology that can contribute greatly to even higher levels of integration in semiconductor devices in combination with 1D layout. However, given increasingly complicated processes and sharp jumps in cost impact with this approach, the ideal solution would be one based on the optical reduction projection method as in the past. We anticipate the appearance of EUV technology as a next-generation lithography technology that will achieve a complementary convergence with etching and film-growing techniques developed with multi-patterning technology.","PeriodicalId":130108,"journal":{"name":"2015 China Semiconductor Technology International Conference","volume":"480 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Enabling capability of multi-patterning towards 10nm and beyond\",\"authors\":\"H. Yaegashi, K. Oyama, A. Hara, Sakurako Natori, Shohei Yamauchi, Masatoshi Yamato, Noriaki Okabe, K. Koike\",\"doi\":\"10.1109/CSTIC.2015.7153363\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Scaling in the manufacture of semiconductor devices has come to be supported by advances in photolithography technology. Looking to the future, we can expect even more advances in photolithography, but at present, multi-patterning using 193nm immersion lithography is finding widespread use as an alternative technology that can contribute greatly to even higher levels of integration in semiconductor devices in combination with 1D layout. However, given increasingly complicated processes and sharp jumps in cost impact with this approach, the ideal solution would be one based on the optical reduction projection method as in the past. We anticipate the appearance of EUV technology as a next-generation lithography technology that will achieve a complementary convergence with etching and film-growing techniques developed with multi-patterning technology.\",\"PeriodicalId\":130108,\"journal\":{\"name\":\"2015 China Semiconductor Technology International Conference\",\"volume\":\"480 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 China Semiconductor Technology International Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC.2015.7153363\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 China Semiconductor Technology International Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC.2015.7153363","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Enabling capability of multi-patterning towards 10nm and beyond
Scaling in the manufacture of semiconductor devices has come to be supported by advances in photolithography technology. Looking to the future, we can expect even more advances in photolithography, but at present, multi-patterning using 193nm immersion lithography is finding widespread use as an alternative technology that can contribute greatly to even higher levels of integration in semiconductor devices in combination with 1D layout. However, given increasingly complicated processes and sharp jumps in cost impact with this approach, the ideal solution would be one based on the optical reduction projection method as in the past. We anticipate the appearance of EUV technology as a next-generation lithography technology that will achieve a complementary convergence with etching and film-growing techniques developed with multi-patterning technology.