A. Yukawa, K. Nakayama, Y. Kawakami, K. Hinooka, Y. Mizukami
{"title":"具有轨对轨输入电压能力的过采样ADC宏单元","authors":"A. Yukawa, K. Nakayama, Y. Kawakami, K. Hinooka, Y. Mizukami","doi":"10.1109/ISSCC.1987.1157154","DOIUrl":null,"url":null,"abstract":"A 14b fully differential oversampling analog-to-digital converter that has 0.01% harmonic distortion and samples at 1MHz and additionally has rail-to-rail input voltage capability, will be presented. The macrocell has been fabricated in 1.5μm CMOS technology: die size is 1.5×0.8mm.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1987-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An oversampling ADC macrocell with rail-to-rail input voltage capability\",\"authors\":\"A. Yukawa, K. Nakayama, Y. Kawakami, K. Hinooka, Y. Mizukami\",\"doi\":\"10.1109/ISSCC.1987.1157154\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 14b fully differential oversampling analog-to-digital converter that has 0.01% harmonic distortion and samples at 1MHz and additionally has rail-to-rail input voltage capability, will be presented. The macrocell has been fabricated in 1.5μm CMOS technology: die size is 1.5×0.8mm.\",\"PeriodicalId\":102932,\"journal\":{\"name\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1987-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1987.1157154\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An oversampling ADC macrocell with rail-to-rail input voltage capability
A 14b fully differential oversampling analog-to-digital converter that has 0.01% harmonic distortion and samples at 1MHz and additionally has rail-to-rail input voltage capability, will be presented. The macrocell has been fabricated in 1.5μm CMOS technology: die size is 1.5×0.8mm.