基于可定制媒体微处理器的单片MPEG-2编解码器

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012789

S. Ishiwata, T. Yamakage, Y. Tsuboi, T. Shimazawa, T. Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, T. Kodama, Nobu Matsumoto, Takayuki Kamei, T. Miyamori, G. Ootomo, M. Matsui

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引用次数: 12

摘要

描述了一种单片MPEG2 MP@ML编解码器，该编解码器在72mm/sup /芯片上集成了3.8M门。它具有异构多处理器架构，其中六个具有相同指令集但不同定制的微处理器同时执行特定任务，如视频，音频等。为数字媒体处理而开发的微处理器，在其架构中提供了各种扩展，如VLIW扩展和DSP扩展。该芯片充分利用扩展，实现视频、音频和系统的实时并行编解码。

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A single-chip MPEG-2 codec based on customizable media microprocessor

A single-chip MPEG2 MP@ML codec, integrating 3.8M gates on a 72mm/sup 2/ die, is described. It has a heterogeneous multiprocessor architecture in which six microprocessors with the same instruction set but different customization execute specific tasks such as video, audio etc. concurrently. The microprocessor, developed for digital media processing, provides various extensions such as a VLIW one and a DSP one inherent in its architecture. Making full use of the extensions, the chip executes encoding and decoding of video, audio and system concurrently in real time.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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