用于ADSL中继局应用的700mw CMOS线路驱动器

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI:10.1109/ISSCC.2003.1234363

A. Bicakci, Chun-Sup Kim, Sang-Soo Lee, C. Conroy

{"title":"用于ADSL中继局应用的700mw CMOS线路驱动器","authors":"A. Bicakci, Chun-Sup Kim, Sang-Soo Lee, C. Conroy","doi":"10.1109/ISSCC.2003.1234363","DOIUrl":null,"url":null,"abstract":"A dual-channel analog front-end for ANSI/ETSI standards compliant VDSL in 0.25/0.5/spl mu/m 1P 5M CMOS is presented. The chip includes a non-linearity cancelling multi-path line driver achieving -76dBc 3rd harmonic distortion at 12MHz, a 75mW continuous-time multi-bit 3rd-order self-calibrating /spl Sigma//spl Delta/ ADC, a 14b current-steering DAC with PSD mask post filter, a 0-35dB variable-gain amplifier with adjustable hybrid, and a 12ps jitter LC PLL.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 700 mW CMOS line driver for ADSL central office applications\",\"authors\":\"A. Bicakci, Chun-Sup Kim, Sang-Soo Lee, C. Conroy\",\"doi\":\"10.1109/ISSCC.2003.1234363\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A dual-channel analog front-end for ANSI/ETSI standards compliant VDSL in 0.25/0.5/spl mu/m 1P 5M CMOS is presented. The chip includes a non-linearity cancelling multi-path line driver achieving -76dBc 3rd harmonic distortion at 12MHz, a 75mW continuous-time multi-bit 3rd-order self-calibrating /spl Sigma//spl Delta/ ADC, a 14b current-steering DAC with PSD mask post filter, a 0-35dB variable-gain amplifier with adjustable hybrid, and a 12ps jitter LC PLL.\",\"PeriodicalId\":171288,\"journal\":{\"name\":\"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-02-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2003.1234363\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2003.1234363","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 5

摘要

提出了一种适用于符合ANSI/ETSI标准VDSL的0.25/0.5/spl mu/m 1p5m CMOS双通道模拟前端。该芯片包括一个在12MHz下实现-76dBc三次谐波失真的非线性抵消多径线路驱动器，一个75mW连续多比特三阶自校准/spl Sigma//spl Delta/ ADC，一个带PSD掩模后滤波器的14b电流转向DAC，一个带可调混合的0-35dB可变增益放大器，以及一个12ps抖动LC锁相环。

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A 700 mW CMOS line driver for ADSL central office applications

A dual-channel analog front-end for ANSI/ETSI standards compliant VDSL in 0.25/0.5/spl mu/m 1P 5M CMOS is presented. The chip includes a non-linearity cancelling multi-path line driver achieving -76dBc 3rd harmonic distortion at 12MHz, a 75mW continuous-time multi-bit 3rd-order self-calibrating /spl Sigma//spl Delta/ ADC, a 14b current-steering DAC with PSD mask post filter, a 0-35dB variable-gain amplifier with adjustable hybrid, and a 12ps jitter LC PLL.

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来源期刊

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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