Qing Dong, Supreet Jeloka, Mehdi Saligane, Yejoong Kim, Masaru Kawaminami, A. Harada, S. Miyoshi, D. Blaauw, D. Sylvester
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引用次数: 38
摘要
提出了一种具有搜索和逻辑功能的4+2T SRAM。该单元使用n阱作为写字线(WL)，并消除了访问晶体管。解耦的读取路径为内存中的布尔逻辑函数提供了可靠的多词激活。SRAM可以重新配置为BCAM/TCAM进行搜索操作，在0.35V时具有0.13fJ/search/bit。40个测试芯片采用55nm深度耗尽通道(DDC)技术，达到最坏情况0.3 V VDDmin。
A 0.3V VDDmin 4+2T SRAM for searching and in-memory computing using 55nm DDC technology
A 4+2T SRAM is proposed that offers searching and logic functions. The cell uses the N-well as the write wordline (WL) and eliminates the access transistors. Decoupled read paths enable reliable multi-word activation for in-memory Boolean logic functions. The SRAM can reconfigure to BCAM/TCAM for searching operations, with 0.13fJ/search/bit at 0.35V. Forty test chips in 55nm deeply depleted channel (DDC) technology achieve worst-case 0.3 V VDDmin.
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