{"title":"ME-TCAM:基于FPGA多抽运LUTRAM的高效内存三元内容可寻址存储器","authors":"Zilin Shi, Hui Yang, Rulin Liu, Jinli Yan, Peng Qiao, Baosheng Wang","doi":"10.1109/ICHCI51889.2020.00016","DOIUrl":null,"url":null,"abstract":"Static random access memory (SRAM) on field programmable gate arrays (FPGAs) can be emulated to offer ternary content addressable memory (TCAM) functionality. However, SRAM-based TCAM wastes storage resources. This is due to the limited capacity of the physical addresses in the SRAM unit. This work proposes a LUTRAM-based TACM scheme on the FPGA called Memory-Efficient TCAM (ME-TCAM). METCAM divides SRAM unit into multiple virtual blocks mapping to a portion of the TCAM table to store the more address information of the TCAM table. Operation on SRAM block means that increasing the overall emulated TCAM bits/SRAM. Moreover, ME-TCAM exploits Xilinx primitives to conFigure lookup tables (LUTs) as 32$\\times$ 2 lookup table RAMs (LUTRAMs). We implement ME-TCAM using LUTRAM with a size of 512$\\times$ 48 and 1024$\\times$ 144 on a Virtex-7 FPGA device. Compared with the state-of-the-art research DUR, ME-TCAM achieves at least 2.6 times more memory efficiency.","PeriodicalId":355427,"journal":{"name":"2020 International Conference on Intelligent Computing and Human-Computer Interaction (ICHCI)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"ME-TCAM: Memory-Efficient Ternary Content Addressable Memory Based on Multipumping-Enabled LUTRAM on FPGA\",\"authors\":\"Zilin Shi, Hui Yang, Rulin Liu, Jinli Yan, Peng Qiao, Baosheng Wang\",\"doi\":\"10.1109/ICHCI51889.2020.00016\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Static random access memory (SRAM) on field programmable gate arrays (FPGAs) can be emulated to offer ternary content addressable memory (TCAM) functionality. However, SRAM-based TCAM wastes storage resources. This is due to the limited capacity of the physical addresses in the SRAM unit. This work proposes a LUTRAM-based TACM scheme on the FPGA called Memory-Efficient TCAM (ME-TCAM). METCAM divides SRAM unit into multiple virtual blocks mapping to a portion of the TCAM table to store the more address information of the TCAM table. Operation on SRAM block means that increasing the overall emulated TCAM bits/SRAM. Moreover, ME-TCAM exploits Xilinx primitives to conFigure lookup tables (LUTs) as 32$\\\\times$ 2 lookup table RAMs (LUTRAMs). We implement ME-TCAM using LUTRAM with a size of 512$\\\\times$ 48 and 1024$\\\\times$ 144 on a Virtex-7 FPGA device. Compared with the state-of-the-art research DUR, ME-TCAM achieves at least 2.6 times more memory efficiency.\",\"PeriodicalId\":355427,\"journal\":{\"name\":\"2020 International Conference on Intelligent Computing and Human-Computer Interaction (ICHCI)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Conference on Intelligent Computing and Human-Computer Interaction (ICHCI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICHCI51889.2020.00016\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Conference on Intelligent Computing and Human-Computer Interaction (ICHCI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICHCI51889.2020.00016","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ME-TCAM: Memory-Efficient Ternary Content Addressable Memory Based on Multipumping-Enabled LUTRAM on FPGA
Static random access memory (SRAM) on field programmable gate arrays (FPGAs) can be emulated to offer ternary content addressable memory (TCAM) functionality. However, SRAM-based TCAM wastes storage resources. This is due to the limited capacity of the physical addresses in the SRAM unit. This work proposes a LUTRAM-based TACM scheme on the FPGA called Memory-Efficient TCAM (ME-TCAM). METCAM divides SRAM unit into multiple virtual blocks mapping to a portion of the TCAM table to store the more address information of the TCAM table. Operation on SRAM block means that increasing the overall emulated TCAM bits/SRAM. Moreover, ME-TCAM exploits Xilinx primitives to conFigure lookup tables (LUTs) as 32$\times$ 2 lookup table RAMs (LUTRAMs). We implement ME-TCAM using LUTRAM with a size of 512$\times$ 48 and 1024$\times$ 144 on a Virtex-7 FPGA device. Compared with the state-of-the-art research DUR, ME-TCAM achieves at least 2.6 times more memory efficiency.