{"title":"改进FinFET SoC设计中动态IR降信号的分析覆盖率","authors":"Minji Lee, Changseok Choi, Donghyeon Seo, Byeongjun Bang, Yongseok Kang, Woohyun Paik","doi":"10.1109/ISOCC50952.2020.9332987","DOIUrl":null,"url":null,"abstract":"Power grid design is one of the key challenges in large SoC design. In order to guarantee robustness of the power grid, dynamic IR drop should be analyzed correctly. In this paper, we have described weakness of vectorless analysis and necessity of vector-based analysis. We have improved analysis coverage for the more accurate dynamic IR drop analysis. The analysis results were obtained with the FinFET technology node and all simulations were done in the ANSYS RedHawk.","PeriodicalId":270577,"journal":{"name":"2020 International SoC Design Conference (ISOCC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Improving Analysis Coverage for Dynamic IR Drop Sign-off in FinFET SoC Design\",\"authors\":\"Minji Lee, Changseok Choi, Donghyeon Seo, Byeongjun Bang, Yongseok Kang, Woohyun Paik\",\"doi\":\"10.1109/ISOCC50952.2020.9332987\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power grid design is one of the key challenges in large SoC design. In order to guarantee robustness of the power grid, dynamic IR drop should be analyzed correctly. In this paper, we have described weakness of vectorless analysis and necessity of vector-based analysis. We have improved analysis coverage for the more accurate dynamic IR drop analysis. The analysis results were obtained with the FinFET technology node and all simulations were done in the ANSYS RedHawk.\",\"PeriodicalId\":270577,\"journal\":{\"name\":\"2020 International SoC Design Conference (ISOCC)\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC50952.2020.9332987\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC50952.2020.9332987","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Improving Analysis Coverage for Dynamic IR Drop Sign-off in FinFET SoC Design
Power grid design is one of the key challenges in large SoC design. In order to guarantee robustness of the power grid, dynamic IR drop should be analyzed correctly. In this paper, we have described weakness of vectorless analysis and necessity of vector-based analysis. We have improved analysis coverage for the more accurate dynamic IR drop analysis. The analysis results were obtained with the FinFET technology node and all simulations were done in the ANSYS RedHawk.