一个400-MHz处理器，用于数字通信应用的矩形到极坐标的有效转换

2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) Pub Date : 2002-06-13 DOI:10.1109/VLSIC.2002.1015096

D.D. Hwang, Dengwei Fu, A. Willson

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引用次数: 4

摘要

在0.25-/spl mu/m CMOS中实现了400 mhz数字矩形到极坐标转换器。芯片的输入为14位同相通道和正交通道，输出为15位幅度通道和相位通道。相位和幅度计算的最大误差分别为0.00024和0.03。在最大频率为406 MHz时，电路在2.5 V时耗散470 mW的功率。

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A 400-MHz processor for the efficient conversion of rectangular to polar coordinates for digital communications applications

A 400-MHz digital rectangular-to-polar coordinate converter has been implemented in 0.25-/spl mu/m CMOS. The inputs to the chip are 14-bit in-phase and quadrature channels, and the outputs are 15-bit magnitude and phase channels. The phase and magnitude calculations have a maximum error of 0.00024 and 0.03, respectively. At a maximum frequency of 406 MHz, the circuit dissipates 470 mW of power at 2.5 V.

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2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)

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