J.W.Y. Teo, H. Lim, Y. Jin, J.H. Huang, W.C. Chew, C.K. Leong, F. Gn, M.F. Li, G. Su
{"title":"用捕集剂抑制金属污染","authors":"J.W.Y. Teo, H. Lim, Y. Jin, J.H. Huang, W.C. Chew, C.K. Leong, F. Gn, M.F. Li, G. Su","doi":"10.1109/IPFA.2001.941489","DOIUrl":null,"url":null,"abstract":"Starting-material-related defects and line processes are often blamed for high reliability failure rates of gate oxides. Polished wafers are first observed to have higher gate oxide reliability failure rates compared to epitaxial wafers, leading to the initial presumption that this difference in failure rate is attributed to starting material issues. Further investigations revealed that it is not silicon surface imperfections that are the cause of the high gate oxide reliability failures. Instead, results pinpoint metal contamination as the culprit for high reliability failures. However, metal contamination due to processing of epitaxial wafers is suppressed by the gettering effect of oxygen precipitates inside the silicon substrate.","PeriodicalId":297053,"journal":{"name":"Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548)","volume":"310 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Suppression of metal contamination by gettering\",\"authors\":\"J.W.Y. Teo, H. Lim, Y. Jin, J.H. Huang, W.C. Chew, C.K. Leong, F. Gn, M.F. Li, G. Su\",\"doi\":\"10.1109/IPFA.2001.941489\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Starting-material-related defects and line processes are often blamed for high reliability failure rates of gate oxides. Polished wafers are first observed to have higher gate oxide reliability failure rates compared to epitaxial wafers, leading to the initial presumption that this difference in failure rate is attributed to starting material issues. Further investigations revealed that it is not silicon surface imperfections that are the cause of the high gate oxide reliability failures. Instead, results pinpoint metal contamination as the culprit for high reliability failures. However, metal contamination due to processing of epitaxial wafers is suppressed by the gettering effect of oxygen precipitates inside the silicon substrate.\",\"PeriodicalId\":297053,\"journal\":{\"name\":\"Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548)\",\"volume\":\"310 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2001.941489\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2001.941489","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Starting-material-related defects and line processes are often blamed for high reliability failure rates of gate oxides. Polished wafers are first observed to have higher gate oxide reliability failure rates compared to epitaxial wafers, leading to the initial presumption that this difference in failure rate is attributed to starting material issues. Further investigations revealed that it is not silicon surface imperfections that are the cause of the high gate oxide reliability failures. Instead, results pinpoint metal contamination as the culprit for high reliability failures. However, metal contamination due to processing of epitaxial wafers is suppressed by the gettering effect of oxygen precipitates inside the silicon substrate.