Applying the Discrete Network Design Problem (DNDP) for designing AMHS layouts in semiconductor fabs

The Discrete Network Design Problem (DNDP) facilitates semi-automated AMHS layout generation in OHT systems. In order to increase fab productivity and mitigate waiting time, AMHS design often intends to reduce transportation time and to avoid congestion. During the time consuming and elaborate layout design process, simulation studies are frequently used for evaluating manually generated layouts. However, in this article an analytical approach is implemented, enabling semi-automated AMHS layout generation with no simulation needed. The applied DNDP is a bi-level mixed-integer optimization model, mostly used in road network design for determining optimal lane additions under consideration of dynamic routing and traffic equilibrium. In this article, the suitability of the DNDP for generating AMHS layouts is assessed. In addition, opportunities and limits of its application are discussed by means of an use case from semi­conductor industry. Furthermore, additions to the formulation of the DNDP model are introduced to attain new functionality and ensure suitability to AMHS layout design. Due to its bi­level and non-convex structure, solving the DNDP in acceptable time is considered to be challenging. Thus, the application of two branch & bound algorithms and three heuristics (local search, tabu search and simulated annealing) for solving the DNDP in AMHS design is examined.