在28nm FD-SOI CMOS中,具有30%锁定范围的4.3 mw毫米波分二电路

Therese Forsberg, J. Wernehag, H. Sjöland, Markus Törmänen
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引用次数: 0

摘要

采用片上压控振荡器(VCO)作为输入信号源,在28纳米完全耗尽绝缘体上硅(FD-SOI) CMOS工艺中实现了一种具有高注入效率的毫米波分二电路。测量结果表明,该分频器在输出频率为24 GHz、输入信号功率为-1.5 dBm、0.9 V电源功耗为4.3 mW时具有30.1%的调谐范围。压控振荡器和分频器的组合已调谐范围的10.2%,集中在一个输出频率为30.2 GHz,总能耗6.3 mW, -111 dBc / Hz的输出相位噪声10 MHz抵消。分压器的有效面积为0.032 mm2,分压器和压控振荡器组合的有效面积为0.043 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 4.3-mW mm-Wave Divide-by-Two Circuit with 30% Locking Range in 28-nm FD-SOI CMOS
A mm-wave divide-by-two circuit with high injection efficiency, implemented in a 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS process is demonstrated stand-alone, as well as using an on-chip voltage controlled oscillator (VCO) as the input signal source. Measurements show that the divider has a 30.1 % tuning range centered at an output frequency of 24 GHz, at an input signal power of -1.5 dBm, and a power consumption of 4.3 mW from a 0.9 V supply. The VCO and divider combination has a tuning range of 10.2 %, centered at an output frequency of 30.2 GHz, at a total power consumption of 6.3 mW, and an output phase noise of -111 dBc/Hz at 10 MHz offset. The active area of the divider is 0.032 mm2 and of the divider and VCO combination 0.043 mm2.
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