微处理器有源泄漏功率控制的动态睡眠晶体管和体偏置

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-10-27 DOI:10.1109/JSSC.2003.818291

J. Tschanz, S. Narendra, Y. Ye, B. Bloechel, S. Borkar, V. De

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引用次数: 317

摘要

采用休眠晶体管和体偏置来控制32b整数执行核的有源泄漏，该内核采用100nm双V CMOS技术实现。PMOS睡眠晶体管的性能下降4%，但提供20/spl时间/泄漏减少，这进一步改善了体偏置。泄漏收敛的时间常数范围从30ns到300ns，允许在大于100个时钟周期的空闲时间节省9-44%的功率。

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Dynamic-sleep transistor and body bias for active leakage power control of microprocessors

Sleep transistors and body bias are used to control active leakage for a 32b integer execution core implemented in a 100nm dual V, CMOS technology. A PMOS sleep transistor degrades performance by 4% but offers 20/spl times/ leakage reduction which is further improved with body bias. Time constants for leakage convergence range from 30ns to 300ns allowing 9-44% power savings for idle periods greater than 100 clock cycles.

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2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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