{"title":"微处理器电流特征的表征","authors":"R. Weekly, S. Chun, F. O'Connell","doi":"10.1109/EPEP.2004.1407556","DOIUrl":null,"url":null,"abstract":"This work presents current signatures for a set of test cases running on a general purpose server IBM POWER5/spl trade/ processor under the control of IBM's AIX/spl trade/ operating system. This is part of activities focused on understanding how to optimize the power delivery infrastructure with respect to total system cost. Specifically a better understanding of the current signatures of processors coupled with better understanding of how to design the decoupling infrastructure and in what ways the processor circuits are susceptible to power domain voltage noise is expected to help us accomplish this.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"44 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Characterization of current signatures for microprocessors\",\"authors\":\"R. Weekly, S. Chun, F. O'Connell\",\"doi\":\"10.1109/EPEP.2004.1407556\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents current signatures for a set of test cases running on a general purpose server IBM POWER5/spl trade/ processor under the control of IBM's AIX/spl trade/ operating system. This is part of activities focused on understanding how to optimize the power delivery infrastructure with respect to total system cost. Specifically a better understanding of the current signatures of processors coupled with better understanding of how to design the decoupling infrastructure and in what ways the processor circuits are susceptible to power domain voltage noise is expected to help us accomplish this.\",\"PeriodicalId\":143349,\"journal\":{\"name\":\"Electrical Performance of Electronic Packaging - 2004\",\"volume\":\"44 3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-10-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electronic Packaging - 2004\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.2004.1407556\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging - 2004","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2004.1407556","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization of current signatures for microprocessors
This work presents current signatures for a set of test cases running on a general purpose server IBM POWER5/spl trade/ processor under the control of IBM's AIX/spl trade/ operating system. This is part of activities focused on understanding how to optimize the power delivery infrastructure with respect to total system cost. Specifically a better understanding of the current signatures of processors coupled with better understanding of how to design the decoupling infrastructure and in what ways the processor circuits are susceptible to power domain voltage noise is expected to help us accomplish this.
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