F. Angione, P. Bernardi, Gabriele Filipponi, Claudia Tempesta, M. Reorda, D. Appello, V. Tancorre, R. Ugioli
{"title":"实时操作系统级并发内存bist执行的在线调度","authors":"F. Angione, P. Bernardi, Gabriele Filipponi, Claudia Tempesta, M. Reorda, D. Appello, V. Tancorre, R. Ugioli","doi":"10.1109/DFT56152.2022.9962338","DOIUrl":null,"url":null,"abstract":"Automotive System-on-Chip (SoC) performances have enormously increased in the last decade. Therefore, bare-metal safety-critical applications have shifted to the new application paradigm written at the Operating System layer, i.e., on top of Real-Time Operating Systems (RTOS). The RTOS stores needed data and instructions in the embedded memories. Therefore, potential corruption in these memories could generate non-deterministic, wrong behaviors. Online software or hardware testing mechanisms detect and sometimes correct such dangerous situations. In either case, the application programmer has to devise special tasks devoted to testing and must ensure fully working synchronization mechanisms without impacting the feasibility of the RTOS scheduler. This paper investigates the impact on the scheduling and reliability of an RTOS when hardware and software memory BIST periodically test embedded RAMs in the field. The results are obtained on a real automotive SoC belonging to the SPC58 family from ST Microelectronics.","PeriodicalId":411011,"journal":{"name":"2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Online scheduling of concurrent Memory BISTs execution at Real-Time Operating-System level\",\"authors\":\"F. Angione, P. Bernardi, Gabriele Filipponi, Claudia Tempesta, M. Reorda, D. Appello, V. Tancorre, R. Ugioli\",\"doi\":\"10.1109/DFT56152.2022.9962338\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Automotive System-on-Chip (SoC) performances have enormously increased in the last decade. Therefore, bare-metal safety-critical applications have shifted to the new application paradigm written at the Operating System layer, i.e., on top of Real-Time Operating Systems (RTOS). The RTOS stores needed data and instructions in the embedded memories. Therefore, potential corruption in these memories could generate non-deterministic, wrong behaviors. Online software or hardware testing mechanisms detect and sometimes correct such dangerous situations. In either case, the application programmer has to devise special tasks devoted to testing and must ensure fully working synchronization mechanisms without impacting the feasibility of the RTOS scheduler. This paper investigates the impact on the scheduling and reliability of an RTOS when hardware and software memory BIST periodically test embedded RAMs in the field. The results are obtained on a real automotive SoC belonging to the SPC58 family from ST Microelectronics.\",\"PeriodicalId\":411011,\"journal\":{\"name\":\"2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT56152.2022.9962338\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT56152.2022.9962338","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Online scheduling of concurrent Memory BISTs execution at Real-Time Operating-System level
Automotive System-on-Chip (SoC) performances have enormously increased in the last decade. Therefore, bare-metal safety-critical applications have shifted to the new application paradigm written at the Operating System layer, i.e., on top of Real-Time Operating Systems (RTOS). The RTOS stores needed data and instructions in the embedded memories. Therefore, potential corruption in these memories could generate non-deterministic, wrong behaviors. Online software or hardware testing mechanisms detect and sometimes correct such dangerous situations. In either case, the application programmer has to devise special tasks devoted to testing and must ensure fully working synchronization mechanisms without impacting the feasibility of the RTOS scheduler. This paper investigates the impact on the scheduling and reliability of an RTOS when hardware and software memory BIST periodically test embedded RAMs in the field. The results are obtained on a real automotive SoC belonging to the SPC58 family from ST Microelectronics.