{"title":"基于FDCCII的三阶正交正弦振荡器","authors":"Eakluck Wareechol, B. Knobnob, M. Kumngern","doi":"10.1109/TSP.2018.8441208","DOIUrl":null,"url":null,"abstract":"This paper presents a new mixed-mode third-order quadrature sinusoidal oscillator employing one fully differential second-generation current conveyor (FDCCII), three capacitors and three resistors. The circuit provides two quadrature voltage outputs and two quadrature current outputs into single topology. The condition and frequency of oscillations can be orthogonally controlled. FDCCII-based 0.35±m CMOS process is used to implement and simulate the proposed oscillator.","PeriodicalId":383018,"journal":{"name":"2018 41st International Conference on Telecommunications and Signal Processing (TSP)","volume":"257 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"FDCCII -Based Third-Order Quadrature Sinusoidal Oscillator\",\"authors\":\"Eakluck Wareechol, B. Knobnob, M. Kumngern\",\"doi\":\"10.1109/TSP.2018.8441208\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new mixed-mode third-order quadrature sinusoidal oscillator employing one fully differential second-generation current conveyor (FDCCII), three capacitors and three resistors. The circuit provides two quadrature voltage outputs and two quadrature current outputs into single topology. The condition and frequency of oscillations can be orthogonally controlled. FDCCII-based 0.35±m CMOS process is used to implement and simulate the proposed oscillator.\",\"PeriodicalId\":383018,\"journal\":{\"name\":\"2018 41st International Conference on Telecommunications and Signal Processing (TSP)\",\"volume\":\"257 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 41st International Conference on Telecommunications and Signal Processing (TSP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TSP.2018.8441208\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 41st International Conference on Telecommunications and Signal Processing (TSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TSP.2018.8441208","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a new mixed-mode third-order quadrature sinusoidal oscillator employing one fully differential second-generation current conveyor (FDCCII), three capacitors and three resistors. The circuit provides two quadrature voltage outputs and two quadrature current outputs into single topology. The condition and frequency of oscillations can be orthogonally controlled. FDCCII-based 0.35±m CMOS process is used to implement and simulate the proposed oscillator.