{"title":"采用0.35um SiGe BiCMOS技术的ku波段高隔离SPDT开关","authors":"Wenju Li, Kaixue Ma, Shouxian Mou","doi":"10.1109/ISICIR.2016.7829686","DOIUrl":null,"url":null,"abstract":"In this paper, a compact high isolation 14–18 GHz SPDT switch using triple-well transistors based on 0.35µm SiGe BiCMOS process is proposed. Improved series-shunt-shunt topology is used in this design to increase the isolation and to reduce the insertion loss concurrently. In order to improve the power handling capability, body-floating technique is employed and analyzed. The simulation results shown that in the interested frequency band of 14–18 GHz, the insertion loss of the ON state path is better than 1.5 dB, and the isolation of the OFF state path is higher than 44dB. The P1dB of the ON state path at center frequency 15.5 GHz is 13dBm, and the chip size is 0.125 mm2.","PeriodicalId":159343,"journal":{"name":"2016 International Symposium on Integrated Circuits (ISIC)","volume":"216 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Ku-band high-isolation SPDT switch in 0.35um SiGe BiCMOS technology\",\"authors\":\"Wenju Li, Kaixue Ma, Shouxian Mou\",\"doi\":\"10.1109/ISICIR.2016.7829686\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a compact high isolation 14–18 GHz SPDT switch using triple-well transistors based on 0.35µm SiGe BiCMOS process is proposed. Improved series-shunt-shunt topology is used in this design to increase the isolation and to reduce the insertion loss concurrently. In order to improve the power handling capability, body-floating technique is employed and analyzed. The simulation results shown that in the interested frequency band of 14–18 GHz, the insertion loss of the ON state path is better than 1.5 dB, and the isolation of the OFF state path is higher than 44dB. The P1dB of the ON state path at center frequency 15.5 GHz is 13dBm, and the chip size is 0.125 mm2.\",\"PeriodicalId\":159343,\"journal\":{\"name\":\"2016 International Symposium on Integrated Circuits (ISIC)\",\"volume\":\"216 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Symposium on Integrated Circuits (ISIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISICIR.2016.7829686\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Symposium on Integrated Circuits (ISIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISICIR.2016.7829686","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Ku-band high-isolation SPDT switch in 0.35um SiGe BiCMOS technology
In this paper, a compact high isolation 14–18 GHz SPDT switch using triple-well transistors based on 0.35µm SiGe BiCMOS process is proposed. Improved series-shunt-shunt topology is used in this design to increase the isolation and to reduce the insertion loss concurrently. In order to improve the power handling capability, body-floating technique is employed and analyzed. The simulation results shown that in the interested frequency band of 14–18 GHz, the insertion loss of the ON state path is better than 1.5 dB, and the isolation of the OFF state path is higher than 44dB. The P1dB of the ON state path at center frequency 15.5 GHz is 13dBm, and the chip size is 0.125 mm2.
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