ATLAS I是一种高性能、支持背压的16/spl次/16 ATM交换机

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) Pub Date : 1998-09-13 DOI:10.1109/ASIC.1998.722791

D. Pnevmatikatos, G. Kornaros, G. Kalokerinos, C. Xanthaki

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引用次数: 0

摘要

我们介绍了ATLAS I的总体结构，重点介绍了内存的使用和需求。我们根据功能和带宽对这些需求进行了分类，并提出了我们在0.35 /spl mu/ CMOS技术中首次实现ATLAS I时使用的解决方案。这种实现可以作为设计具有类似ATLAS I功能的未来交换机的起点。

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The memory structures of ATLAS I, a high-performance, 16/spl times/16 ATM switch supporting backpressure

We present the overall structure of ATLAS I, emphasizing the memory use and requirements. We categorize these requirements in functionality and bandwidth and present the solutions we used in the first implementation of ATLAS I in a 0.35 /spl mu/ CMOS technology. This implementation can serve as a starting point in the design of future switches with functionality similar to ATLAS I.

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Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

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