改善用于28nm FDSOI中10ghz软件定义无线电的CMOS宽带无电感平衡lna的噪声和线性度

2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) Pub Date : 2017-10-01 DOI:10.1109/S3S.2017.8309267

C. Gimeno, François Stas, G. de Streel, D. Bol, D. Flandre

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引用次数: 4

摘要

本文提出了一种基于28nm全耗尽SOI CMOS技术的宽带通用软件定义无线电收发器的无电感平衡低噪声放大器(LNA)的分析和优化算法，该算法优化了主要性能指标。两种技术的最佳组合提供了一种新的拓扑结构，克服了以前电路的主要权衡，提高了线性度和噪声，具有竞争带宽(BW)，增益和功率。布局后仿真显示，在1 v电源下，BW为10 GHz，增益为17 dB, IIP3为7.4 dBm, NF为3.4 dB，功耗仅为2.5 mW。

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Improving noise and linearity of CMOS wideband inductorless balun LNAs for 10-GHz software-defined radios in 28nm FDSOI

This paper presents the analysis and optimization of inductorless balun low-noise amplifiers (LNA) in a 28-nm fully-depleted SOI CMOS technology for wideband universal software-defined radio transceivers by means of an algorithm that optimizes the main figures of merit. An optimum combination of two techniques is provided leading to a new topology that overcomes the main tradeoffs of the previous circuits improving both linearity and noise with competitive bandwidth (BW), gain and power. Post-layout simulations show a BW of 10 GHz, a gain of 17 dB, an IIP3 of 7.4 dBm, and a NF of 3.4 dB with only 2.5 mW power consumption from a 1-V supply.

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2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

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