一种自动FPGA设计与实现框架

Qian Zhao, M. Amagasaki, M. Iida, M. Kuga, T. Sueyoshi
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引用次数: 6

摘要

传统的FPGA设计和实现过程包括两个独立的流程。FPGA架构是根据FPGA设计流程确定的。然而,在实施阶段,使用商用VLSI设计流程。为了提高可合成FPGA IP的设计效率,本文提出了一种FPGA设计框架。在此框架下,开发了一种新颖的FPGA路由工具EasyRouter,可以有效地桥接这两个流。有了这个设计流程,当使用可靠的商用VLSI cad评估新的FPGA IP架构时,可以报告准确的物理信息。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An automatic FPGA design and implementation framework
Conventional FPGA design and implementation processes involve two separate flows. The FPGA architecture is determined by academic FPGA design flow. However, in the implementation phase, commercial VLSI design flow are used. In this research, we propose an FPGA design framework in order to improve synthesizable FPGA IP design efficiency. A novel FPGA routing tool is developed in this framework, namely the EasyRouter, which can bridge the two flows efficiently. With this design flow, accurate physical information can be reported when a new FPGA IP architecture is evaluated with reliable commercial VLSI CADs.
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