0.13µm CMOS ΔΣ锁相环调频发射机

2011 NORCHIP Pub Date : 2011-11-01 DOI:10.1109/NORCHP.2011.6126744

Ying Wu, Xiaodong Liu, D. Ye, Vijay Viswam, Lin Zhu, P. Lu, D. Radjen, H. Sjöland

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引用次数: 0

摘要

介绍了一种短波调频发射机。它采用一种结构，其中锁相环(PLL)的输出频率通过使用ΔΣ ADC的1位输出改变反馈分频器的除数来调制。在75 kHz偏差下，测量到的总谐波失真(THD)加噪声小于1%。发射器完全集成在0.13 μ m CMOS工艺中，核心面积为0.24 mm2。来自1.2V电源的电流消耗为4.4mA。

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A 0.13µm CMOS ΔΣ PLL FM transmitter

A short range FM transmitter is presented. It uses an architecture where the output frequency of a phase locked loop (PLL) is modulated by varying the division number of the feedback divider, using the 1-bit output of a ΔΣ ADC. The measured total harmonic distortion (THD) plus noise is less than 1% at 75 kHz deviation. The transmitter is fully integrated in a 0.13µm CMOS process and the core area is 0.24 mm2. The current consumption is 4.4mA from a 1.2V supply.

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2011 NORCHIP

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