{"title":"一种自定义模拟单元布局的新方法","authors":"L. Donzelle, P. Dubois","doi":"10.1109/EDAC.1991.206452","DOIUrl":null,"url":null,"abstract":"A new layout system for analog cells is presented. Unlike most other systems, the problem of interaction is addressed: the goal is to enable an analog expert to achieve the layout of common analog cells, in less than half a day, the final result being as good as a totally handcrafted layout. The system is divided into two main parts: first, the primitives which are necessary to generate the layout of analog cells (generation of devices, associations and symmetries of basic elements, interactive routing); second, an easy to use graphic environment, which provides enough interaction in the manipulation of basic structures to enable the designer to reach the layout he desires. Many real cells have been laid out using this tool. Some final results on silicon are reported.<<ETX>>","PeriodicalId":425087,"journal":{"name":"Proceedings of the European Conference on Design Automation.","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A new approach to layout of custom analog cells\",\"authors\":\"L. Donzelle, P. Dubois\",\"doi\":\"10.1109/EDAC.1991.206452\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new layout system for analog cells is presented. Unlike most other systems, the problem of interaction is addressed: the goal is to enable an analog expert to achieve the layout of common analog cells, in less than half a day, the final result being as good as a totally handcrafted layout. The system is divided into two main parts: first, the primitives which are necessary to generate the layout of analog cells (generation of devices, associations and symmetries of basic elements, interactive routing); second, an easy to use graphic environment, which provides enough interaction in the manipulation of basic structures to enable the designer to reach the layout he desires. Many real cells have been laid out using this tool. Some final results on silicon are reported.<<ETX>>\",\"PeriodicalId\":425087,\"journal\":{\"name\":\"Proceedings of the European Conference on Design Automation.\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-02-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the European Conference on Design Automation.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAC.1991.206452\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the European Conference on Design Automation.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAC.1991.206452","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new layout system for analog cells is presented. Unlike most other systems, the problem of interaction is addressed: the goal is to enable an analog expert to achieve the layout of common analog cells, in less than half a day, the final result being as good as a totally handcrafted layout. The system is divided into two main parts: first, the primitives which are necessary to generate the layout of analog cells (generation of devices, associations and symmetries of basic elements, interactive routing); second, an easy to use graphic environment, which provides enough interaction in the manipulation of basic structures to enable the designer to reach the layout he desires. Many real cells have been laid out using this tool. Some final results on silicon are reported.<>