{"title":"用于电源电压低于2v的eeprom的片上高压发生器电路","authors":"K. Sawada, Y. Sugawara, S. Masui","doi":"10.1109/VLSIC.1995.520692","DOIUrl":null,"url":null,"abstract":"We propose an on-chip high-voltage generator circuit for low-voltage EEPROMs composed of a pMOSFET-based charge pump circuit driven by bootstrapped clock generators. The voltage gain per unit stage does not suffer from the threshold voltage drop. The device implemented in a 1.2 /spl mu/m CMOS technology operates as low as 1 V.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"71","resultStr":"{\"title\":\"An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V\",\"authors\":\"K. Sawada, Y. Sugawara, S. Masui\",\"doi\":\"10.1109/VLSIC.1995.520692\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose an on-chip high-voltage generator circuit for low-voltage EEPROMs composed of a pMOSFET-based charge pump circuit driven by bootstrapped clock generators. The voltage gain per unit stage does not suffer from the threshold voltage drop. The device implemented in a 1.2 /spl mu/m CMOS technology operates as low as 1 V.\",\"PeriodicalId\":256846,\"journal\":{\"name\":\"Digest of Technical Papers., Symposium on VLSI Circuits.\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-06-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"71\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Technical Papers., Symposium on VLSI Circuits.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1995.520692\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers., Symposium on VLSI Circuits.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1995.520692","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V
We propose an on-chip high-voltage generator circuit for low-voltage EEPROMs composed of a pMOSFET-based charge pump circuit driven by bootstrapped clock generators. The voltage gain per unit stage does not suffer from the threshold voltage drop. The device implemented in a 1.2 /spl mu/m CMOS technology operates as low as 1 V.