K. Ueno, H. Murakami, N. Yano, R. Okuda, T. Himeno, T. Kamei, Y. Urakawa
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A Design Methodology Realizing an Over GHz Synthesizable Streaming Processing Unit
A 7.07 mm2 synthesizable streaming processing unit (SPU) is fabricated in a 65 nm CMOS technology with 8 level copper layers. It is migrated from its original custom design to a synthesizable design to get higher design portability. New features are a new floor plan, height optimized standard cell library, local clock generator cloning and adaptive wire width control. Its logic area is 30% smaller than the full custom designed SPU in the same process generation. Correct functional operation is realized in 4 GHz at 1.4 V.
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