{"title":"超薄氧化物MOS结构的表征与建模问题","authors":"G. Ghibaudo, R. Clerc","doi":"10.1109/ICMEL.2004.1314566","DOIUrl":null,"url":null,"abstract":"A review of the main modeling and electrical characterization issues in MOSFETs with ultra gate oxides is presented. In a first part, advances in the modeling of polydepletion in the gate and quantum confinement in the substrate are analyzed and their impacts on the parameter extraction from electrical measurements and numerical simulations are discussed. Moreover, the impact of gate leakage on capacitance measurements is carefully analyzed and procedures to overcome these parasitic effects are introduced. Finally, the implication of gate leakage partitioning between source and drain is addressed both experimentally and theoretically for MOSFET characterization purposes.","PeriodicalId":202761,"journal":{"name":"2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Characterization and modelling issues in MOS structures with ultra thin oxides\",\"authors\":\"G. Ghibaudo, R. Clerc\",\"doi\":\"10.1109/ICMEL.2004.1314566\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A review of the main modeling and electrical characterization issues in MOSFETs with ultra gate oxides is presented. In a first part, advances in the modeling of polydepletion in the gate and quantum confinement in the substrate are analyzed and their impacts on the parameter extraction from electrical measurements and numerical simulations are discussed. Moreover, the impact of gate leakage on capacitance measurements is carefully analyzed and procedures to overcome these parasitic effects are introduced. Finally, the implication of gate leakage partitioning between source and drain is addressed both experimentally and theoretically for MOSFET characterization purposes.\",\"PeriodicalId\":202761,\"journal\":{\"name\":\"2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMEL.2004.1314566\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMEL.2004.1314566","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization and modelling issues in MOS structures with ultra thin oxides
A review of the main modeling and electrical characterization issues in MOSFETs with ultra gate oxides is presented. In a first part, advances in the modeling of polydepletion in the gate and quantum confinement in the substrate are analyzed and their impacts on the parameter extraction from electrical measurements and numerical simulations are discussed. Moreover, the impact of gate leakage on capacitance measurements is carefully analyzed and procedures to overcome these parasitic effects are introduced. Finally, the implication of gate leakage partitioning between source and drain is addressed both experimentally and theoretically for MOSFET characterization purposes.
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