基于FPGA的低地球轨道卫星通信自适应编码与调制发射机设计

Erkan İnceöz, R. Tutgun, Ayse Melda Yüksel Turgut
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引用次数: 0

摘要

在本研究中,利用自适应编码和调制(ACM)技术,开发了一种基于现场可编程门阵列(FPGA)的低地球轨道卫星通信链路高速率发射机。在MATLAB中对所开发的发射机结构进行了建模。然后,以MATLAB模型为参考进行FPGA设计。该设计在赛灵思Kintex Ultrascale XCKU060 FPGA上实现,该FPGA提供高性能,其空间级型号将于2020年12月上市。结果表明,在最高速率模式下,该发射机结构的频谱效率为7.068比特/秒/赫兹(bps/Hz),码率为0.8889。该发射机结构的FPGA设计可支持从50.7225兆比特/秒(Mbps)到530.1兆比特/秒的输入数据速率,波特率为75兆比特/秒(Msps),输出采样率为300兆比特/秒(Msps)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA Based Transmitter Design Using Adaptive Coding and Modulation Schemes for Low Earth Orbit Satellite Communications
In this study, a field-programmable gate array (FPGA) based high rate transmitter is developed for low earth orbit satellite communication links using adaptive coding and modulation (ACM) techniques. The developed transmitter structure is modeled in MATLAB. Then, the MATLAB model is taken as reference for developing an FPGA design. This design is implemented on Xilinx Kintex Ultrascale XCKU060 FPGA which provides high performance and whose space grade model will be on product line in December 2020. It is shown that the developed transmitter structure can reach a spectral efficiency of 7.068 bits per second per Hertz (bps/Hz) with a code rate of 0.8889 in the highest rate mode. The implemented FPGA design of the transmitter structure can support input data rates from 50.7225 megabits per second (Mbps) to 530.1 Mbps with a baud rate of 75 mega symbol per second (Msps) and a sampling rate of 300 mega sample per second (MSps) at the output.
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