{"title":"AIS双通道数字接收机的设计","authors":"Liu Gao, Jian Liu","doi":"10.1109/IMCCC.2012.61","DOIUrl":null,"url":null,"abstract":"A design of dual-channel digital AIS (Automatic Identification System) receiver based on FPGA is introduced. This innovation of this paper is dividing into two channels by mixer, decimation and filter. The Channelization\", \"mixer, FIR filter, FM decoder and GMSK decoder digitized will simplify the design of analog circuits and improve the stability and reliability of the equipment. The theoretical and hardware programs of the system are described. The main theories and modules in FPGA are described in detail. The correctness of program is proved by experiment.","PeriodicalId":394548,"journal":{"name":"2012 Second International Conference on Instrumentation, Measurement, Computer, Communication and Control","volume":"383 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Design of Dual-Channel AIS Digital Receiver\",\"authors\":\"Liu Gao, Jian Liu\",\"doi\":\"10.1109/IMCCC.2012.61\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A design of dual-channel digital AIS (Automatic Identification System) receiver based on FPGA is introduced. This innovation of this paper is dividing into two channels by mixer, decimation and filter. The Channelization\\\", \\\"mixer, FIR filter, FM decoder and GMSK decoder digitized will simplify the design of analog circuits and improve the stability and reliability of the equipment. The theoretical and hardware programs of the system are described. The main theories and modules in FPGA are described in detail. The correctness of program is proved by experiment.\",\"PeriodicalId\":394548,\"journal\":{\"name\":\"2012 Second International Conference on Instrumentation, Measurement, Computer, Communication and Control\",\"volume\":\"383 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 Second International Conference on Instrumentation, Measurement, Computer, Communication and Control\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMCCC.2012.61\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Second International Conference on Instrumentation, Measurement, Computer, Communication and Control","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMCCC.2012.61","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A design of dual-channel digital AIS (Automatic Identification System) receiver based on FPGA is introduced. This innovation of this paper is dividing into two channels by mixer, decimation and filter. The Channelization", "mixer, FIR filter, FM decoder and GMSK decoder digitized will simplify the design of analog circuits and improve the stability and reliability of the equipment. The theoretical and hardware programs of the system are described. The main theories and modules in FPGA are described in detail. The correctness of program is proved by experiment.